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Guide to Embedded Multimedia Card (eMMC)

Delkin Devices Industrial eMMC

eMMC General Description

Designed for a wide range of applications in consumer electronics, mobile phones, handheld computers, navigational systems and other industrial uses, routers, eMMC is an embedded non-volatile memory system, comprised of both flash memory and a flash memory controller, which simplifies the application interface design and frees the host processor from low-level flash memory management. This benefits product developers by simplifying the non-volatile memory interface design and qualification process – resulting in a reduction in time-to-market as well as facilitating support for future flash device offerings. Small BGA package sizes and low power consumption make eMMC a viable, low-cost memory solution for mobile and other space-constrained products. These types of devices either don’t need or can’t fit an SSD. Hence eMMC is a great solution.

eMMC Technical Information

eMMC evolved from the MMC card. The MMC card is not widely used anymore and has been replaced by the SD (Secure Digital) card.  SD and MMC cards are very similar. Initially, the MMC card had a 1 bit data bus, but migrated to a bus that is up to 8 bits wide. The SD card has a bus that is up to 4 bits wide. Both cards actual bus width in operation can be configured by the host during the initialization phase of power up. 1, 4 or 8-bit wide bus operation can be selected by the host.

The eMMC and JDEC specifications interface defines an interface as follows:


Bus Pin NameType of PinFunction
CLKIHost Clock
RST_nIHardware reset
VCCSSupply voltage for Core (BGA)
VCC QSSupply voltage for I/O (BGA)
VDDSSupply voltage (card)
VSSSSupply voltage ground for Core (BGA)
VSS1SSupply voltage ground (card)
VSS2SSupply voltage ground (card)
VSS QSSupply voltage ground for I/O (BGA)



I: input

O: output

PP: push-pull

OD: open-drain

NC: Not connected (or logical high)

S: power supply.


The Multimedia Card transfers data via a configurable number of data bus signals. (1, 4 or 8 data bits). This is negotiated at the Power up initialization phase.

The BUS communication signals between host and card:

  • CLK: Controlled by the host. Each cycle of this signal directs a one bit transfer on the command and either a one bit (1x) or a two bits transfer (2x) on all the data lines (DDR high speed modes). For DDR modes, data is transferred on both leading and trailing edges of the host clock transitions the frequency may vary between zero and the maximum and is controlled by the host clock frequency.
  • CMD: This signal is a bidirectional command channel used for card initialization and transfer of commands.

The CMD signal has two operation modes: open-drain for initialization mode, and push-pull for fast command transfer. Commands are sent from the host  to the card and responses are sent from the card to the host.

  • DAT0-DAT7: These are bidirectional data lines. The DAT signals operate in push-pull mode. The bus is half duplex. Only the card or the host is driving these signals at a time. By default, after power up or reset, only DAT0 issued for data transfer, during card configuration. A wider data bus can then be configured for data transfer, using either DAT0-DAT3 orDAT0-DAT7, by the Multimedia Card controller. The Multimedia Card includes internal pull-ups for data lines DAT1-DAT7. Immediately after entering the 4-bit mode, the card disconnects the internal pull ups of lines DAT1, DAT2, and DAT3. Correspondingly, immediately after entering to the 8-bit mode the card disconnects the internal pull-ups of lines DAT1–DAT7.

Multimedia Cards can be grouped into several card classes which differ in the functions they provide (given by the subset of Multimedia Card system commands):

  • Read Only Memory (ROM) cards. These cards are manufactured with a fixed data content. They are typically used as a distribution media for software, audio, video etc.
  • Read/Write (RW) cards (Flash, One Time Programmable – OTP, Multiple Time Programmable – MTP). These cards are typically sold as blank (empty) media and are used for mass data storage, end user recording of video, audio or digital images.
  • I/O cards. These cards are intended for communication (e.g. modems) and typically will have an additional Interface link. The card is connected directly to the signals of the Multi Media Card bus. The table above summarized the signals.

eMMC Version 5.1 Performance

The contacts on the rear side of the typical eMMC package have a BGA (ball grid array) configuration that reduces unwanted inductance and signal distortion due to the small clearance between chip and board. More specifically, have variable clock frequencies up to 200 MHz, single and DDR transfer rates, and an 8-bit data bus, indicating a theoretical transfer rate of 400MB/S.  In practical terms, one can achieve up to a 280 MB/s read speed and 45 MB/s write speed, depending upon card capacity used and type of flash (TLC, MLC and 3D variants) or SLC. eMMC is also AEC-Q100 certified and undergoes rigorous testing to ensure automotive grade compliance.

eMMC Version 5.1 Densities

Densities of eMMC devices are much smaller than that of SSDs. 64GB storage is common although with the use of 3D TLC NAND Flash can be higher, 128GB+. Hence e. MMC does not replace SATA SSDs. It is most suitable for portable and mobile devices, as well as embedded systems such as routers that require less storage.

eMMC v5.1 defines new features and updates for this embedded mass-storage flash memory that is widely used in smartphones and other mobile devices.  Intended to facilitate an enhanced end user experience, the new version of eMMC offers command queueing for the first time, and also defines important new security updates.

eMMC Basic Operation

Below is an overall summary of eMMC operation. All communication between host and card is controlled by the host (master). The host sends commands of two types: broadcast and addressed (point-to-point) commands.

Broadcast commands

Broadcast commands are intended for all cards in a Multimedia Card system2. Some of these commands require a response. Usually only one card is present but these commands are kept for backward compatibility. There are situations whereby to devices could be used, on for boot and another for storage. But usually one device is used with a boot partition installed.

Addressed (point-to-point) commands

The addressed commands are sent to the addressed card and cause a response from this card. A general overview of the command flow is shown in for the card identification mode and in for the data transfer mode. The commands are listed in the command tables of the eMMC specification.  The dependencies between current state, received command and following state are listed in the eMMC specification.  Five operation modes are defined for the Multimedia Card system (hosts and cards):

  • Boot mode. The card will be in boot mode after power cycle, reception of CMD0 with argument of 0xF0F0F0F0 or (e•MMC only) assertion of hardware reset signal.
  • Card identification mode. The card will will be in card identification mode after boot operation mode is finished or if host and /or card does not support boot operation mode. The card will be in this mode, until the SET_RCA (Set Relative Card Address) command(CMD3) is received.
  • Interrupt mode. Host and card enter and exit interrupt mode simultaneously. In interrupt mode there is no data transfer. The only message allowed is an interrupt service request from the card or the host.
  • Data transfer mode. The card will enter data transfer mode once an RCA is assigned to it. The host will enter data transfer mode after identifying the card on the bus.
  • Inactive mode. The card will enter inactive mode either card operating voltage range or access mode is not valid. The card can also enter inactive mode with Go_INACTIVE_STATE command (CMD15). The card will reset to Pre-idle state with power cycle.



eMMC is a fantastic storage medium used in the right applications. Applications where an SSD cannot be used because of size or cost. Buying an eMMC BGA, and soldering to the motherboard of an embedded system, is easy and offloads the main CPU from low level flash storage management. Device drivers for eMMC are available for several operating systems.

Version 5.1 of eMMC adds more security features to an already security rich format. Transfer speeds are excellent. As always the device is only as good as the HW/FW inside the eMMC module. So, choose carefully. Things like logical to physical mapping schemes, wear leveling, read /write disturb management (flash endurance), read error correction, and type of Flash used should be considered.

Have a question about eMMC flash storage?  The Delkin Customer Applications Team is ready to provide a free consultation so you find the right industrial flash storage solution.


Article Contributor:

Carmine C. Cupani, MSEE

CTech Electronics LLC